ACM Transactions on Reconfigurable Technology and Systems
SCI一区
EI同步收录
月刊
高认可度
更新时间: 浏览量:
期刊基础介绍
TRETS is the top journal focusing on research in, on, and with reconfigurable systems and on their underlying technology. The scope, rationale, and coverage by other journals are often limited to particular aspects of reconfigurable technology or reconfigurable systems. TRETS is a journal that covers reconfigurability in its own right.
Topics that would be appropriate for TRETS would include all levels of reconfigurable system abstractions and all aspects of reconfigurable technology including platforms, programming environments and application successes that support these systems for computing or other applications.
-The board and systems architectures of a reconfigurable platform.
-Programming environments of reconfigurable systems, especially those designed for use with reconfigurable systems that will lead to increased programmer productivity.
-Languages and compilers for reconfigurable systems.
-Logic synthesis and related tools, as they relate to reconfigurable systems.
-Applications on which success can be demonstrated.
The underlying technology from which reconfigurable systems are developed. (Currently this technology is that of FPGAs, but research on the nature and use of follow-on technologies is appropriate for TRETS.)
In considering whether a paper is suitable for TRETS, the foremost question should be whether reconfigurability has been essential to success. Topics such as architecture, programming languages, compilers, and environments, logic synthesis, and high performance applications are all suitable if the context is appropriate. For example, an architecture for an embedded application that happens to use FPGAs is not necessarily suitable for TRETS, but an architecture using FPGAs for which the reconfigurability of the FPGAs is an inherent part of the specifications (perhaps due to a need for re-use on multiple applications) would be appropriate for TRETS.
Topics that would be appropriate for TRETS would include all levels of reconfigurable system abstractions and all aspects of reconfigurable technology including platforms, programming environments and application successes that support these systems for computing or other applications.
-The board and systems architectures of a reconfigurable platform.
-Programming environments of reconfigurable systems, especially those designed for use with reconfigurable systems that will lead to increased programmer productivity.
-Languages and compilers for reconfigurable systems.
-Logic synthesis and related tools, as they relate to reconfigurable systems.
-Applications on which success can be demonstrated.
The underlying technology from which reconfigurable systems are developed. (Currently this technology is that of FPGAs, but research on the nature and use of follow-on technologies is appropriate for TRETS.)
In considering whether a paper is suitable for TRETS, the foremost question should be whether reconfigurability has been essential to success. Topics such as architecture, programming languages, compilers, and environments, logic synthesis, and high performance applications are all suitable if the context is appropriate. For example, an architecture for an embedded application that happens to use FPGAs is not necessarily suitable for TRETS, but an architecture using FPGAs for which the reconfigurability of the FPGAs is an inherent part of the specifications (perhaps due to a need for re-use on multiple applications) would be appropriate for TRETS.
期刊核心参数
通讯方式
2 PENN PLAZA, STE 701, NEW YORK, USA, NY, 10121-0701
涉及的研究方向
COMPUTER SCIENCE, HARDWARE & ARCHITECTURE-
出版国家或地区
UNITED STATES
出版语言
English
年文章数
58
PubMed Central (PMC)链接
平均录用比例
容易
CITESCORE
| CiteScore | SJR | SNIP | CiteScore排名 | ||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|
| 4.40 | 0.621 | 1.300 |
|
WOS期刊JCR分区
WOS分区等级:2区| 按JIF指标学科分区 | 收录子集 | JIF分区 | JIF排名 | JIF百分位 |
| 学科:COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | SCIE | Q2 | 25/60 |
|
| 按JCI指标学科分区 | 收录子集 | JCI分区 | JCI排名 | JCI百分位 |
| 学科:COMPUTER SCIENCE, HARDWARE & ARCHITECTURE | SCIE | Q2 | 27/60 |
|
期刊分区表预警名单
2025年03月发布的2025版:不在预警名单中2024年02月发布的2024版:不在预警名单中
2023年01月发布的2023版:不在预警名单中
2021年12月发布的2021版:不在预警名单中
2020年12月发布的2020版:不在预警名单中
中科院2025年3月升级版
点击查看中国科学院期刊分区趋势图| 大类学科 | 小类学科 | Top期刊 | 综述期刊 | ||
|---|---|---|---|---|---|
| 计算机科学 3区 |
| 否 | 否 |
中科院2023年12月旧的升级版
| 大类学科 | 小类学科 | Top期刊 | 综述期刊 | ||
|---|---|---|---|---|---|
| 计算机科学 4区 |
| 否 | 否 |